Some type of semiconductor device or integrated circuit such as a gate array, a mask ROM and the like is produced by supplementing one or more upper-layer interconnections to units selected out of those previously produced in a half-finished semiconductor device (a half-finished gate array, a half-finished mask ROM et al.) in which plural logic circuits are produced and they are covered by an inter-layer insulator layer on which upper-layer interconnection is scheduled to be produced. In other words, a half-finished semiconductor device such as a half-finished gate array, a half-finished mask ROM and the like, on which plural logic circuits and the wirings immediately connected thereto have been produced but upper-layer interconnection to be connected thereto has not yet been produced is stocked, before final criteria are decided for the semiconductor device. After final criteria are decided, openings are produced to selected locations of an insulator layer which covers the wirings immediately connected to the logic circuits, the openings are buried by plug-shaped conductive pieces, and upper-layer interconnection having a horizontal shape decided following the final criteria, is produced to be connected with the plug-shaped conductive pieces. This production process has an advantage to decrease the process to be conducted after final criteria are decided and to shorten the production period to be conducted after final criteria are decided.
To meet a further requirement to further enhance the foregoing advantage, another system was developed. According to the improved system, process for production of plug-shaped conductive pieces is finished, before final criteria are decided and a process to produce upper-layer interconnection is applied only to selected plug-shaped conductive pieces, after final criteria are decided for the semiconductor device.
This improved system is involved with a drawback in which upper-layer interconnection is required to bypass the plug-shaped conductive pieces remained unselected. This is necessary to keep insulation between the upper-layer interconnection and the plug-shaped conductive pieces remained unselected which are connected monolithic electronic components e.g. transistors constituting the logic circuits produced on the semiconductor substrate.